A gate driver circuit is used to achieve a shift register function, and it includes a plurality of sets of shift registers. For three consecutive shift registers in each set of shift registers, a second shift register is used to input a signal to a third shift register and reset a first shift register, so as to achieve the sequential outputting. Hence, an additional start signal STV needs to be provided to the first shift register so as to initially input each frame, and additional resetting control needs to be performed on the last shift register so as to normally stop the output therefrom.
FIGS. 1 and 2 are diagrams of a cascading principle of a common gate driver circuit (where four clock signals, i.e., CLK1, CLK2, CLK3 and CLK4 are present). As shown in FIGS. 1 and 2, a shift register 11 corresponding to Gate output N is configured to output a scanning signal to pixels in the last row. In order to ensure the uniform output of the scanning signal to the pixels in the respective rows, an additional set of common shift registers, e.g., the shift registers corresponding to Reset output 1 and Reset output 2, may be used to reset the last shift register for outputting the scanning signal.
In order to normally stop the output from the first shift register for resetting, it is required to perform a resetting operation on the first shift register, e.g., in a method as shown in FIG. 1, the shift register unit corresponding to Reset output 1 and the shift register corresponding to Reset output 2 are reset using two additional shift registers with a self resetting function. To be specific, as shown in FIG. 1, a shift register with a self resetting function outputs Reset output 3 to reset a resetting unit that outputs Reset output 1, and another shift register with a self resetting functions outputs Reset output 4 to reset a resetting unit that outputs Reset output 2. However, it is necessary to provide additional thin film transistors (TFTs) for the shift register with the self-setting function, resulting in an increase in the space occupied by the gate driver circuit. As a result, it is impossible to provide a product with a narrow bezel, and the image quality may be adversely affected.
In a method as shown in FIG. 2, the shift register corresponding to Reset output 1 and the shift register corresponding to Reset output 2 are reset using a resetting signal directly from a driver IC (i.e., using an additional resetting signal line RST). However, it also leads to an increase in a bezel width and the IC's production cost.
Hence, there is an urgent need to reset the shift register in the gate driver circuit without increasing the bezel width.